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bart
/
FPGC6
spogulis no https://github.com/bartpleiter/FPGC6
1
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Koks: 69d109e653
Atzari Tagi
FPGC6
/
Quartus
bart 69d109e653 Added hardware signed and unsigned integer division and modulo. Created simple integer calculator to test. Updated several programs and BDOS to use new division hardware while keeping software calculation as legacy functions. 1 gadu atpakaļ
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mainpll 9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL. 1 gadu atpakaļ
mainpll_sim 9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL. 1 gadu atpakaļ
memory 7e81e7fa17 Added files missing from last commit (L1I cache). 1 gadu atpakaļ
modules 69d109e653 Added hardware signed and unsigned integer division and modulo. Created simple integer calculator to test. Updated several programs and BDOS to use new division hardware while keeping software calculation as legacy functions. 1 gadu atpakaļ
output_files 69d109e653 Added hardware signed and unsigned integer division and modulo. Created simple integer calculator to test. Updated several programs and BDOS to use new division hardware while keeping software calculation as legacy functions. 1 gadu atpakaļ
FPGC.qpf e1bb01a621 Cleaned and renamed Quartus project. 1 gadu atpakaļ
FPGC.qsf 69d109e653 Added hardware signed and unsigned integer division and modulo. Created simple integer calculator to test. Updated several programs and BDOS to use new division hardware while keeping software calculation as legacy functions. 1 gadu atpakaļ
FPGC.qws 69d109e653 Added hardware signed and unsigned integer division and modulo. Created simple integer calculator to test. Updated several programs and BDOS to use new division hardware while keeping software calculation as legacy functions. 1 gadu atpakaļ
FPGC.sdc e1bb01a621 Cleaned and renamed Quartus project. 1 gadu atpakaļ
ddr.ppf a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work. 2 gadi atpakaļ
ddr.qip a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work. 2 gadi atpakaļ
ddr.v a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work. 2 gadi atpakaļ
ddr_bb.v a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work. 2 gadi atpakaļ
mainpll.bsf 9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL. 1 gadu atpakaļ
mainpll.cmp 9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL. 1 gadu atpakaļ
mainpll.ppf 9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL. 1 gadu atpakaļ
mainpll.qip 9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL. 1 gadu atpakaļ
mainpll.sip 9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL. 1 gadu atpakaļ
mainpll.spd 9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL. 1 gadu atpakaļ
mainpll.v 9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL. 1 gadu atpakaļ
mainpll_sim.f 9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL. 1 gadu atpakaļ
output_file.cof e1bb01a621 Cleaned and renamed Quartus project. 1 gadu atpakaļ