Почетна Преглед Помоћ
Пријавите се
bart
/
FPGC6
огледало од https://github.com/bartpleiter/FPGC6
1
0
Креирај огранак 0
Датотеке Дискусије 0 Вики
Грана: cpu100mhz
Гране Ознаке
FPGC6
/
Quartus
/
mainpll_sim
/
cadence
bart 9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL. пре 1 година
..
cds.lib 9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL. пре 1 година
hdl.var 9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL. пре 1 година
ncsim_setup.sh 9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL. пре 1 година