This website works better with JavaScript
Domovská stránka
Prehľadávať
Pomoc
Prihlásiť sa
bart
/
FPGC6
zrkadlo
https://github.com/bartpleiter/FPGC6
Pridať medzi pozorované
1
Hviezda
0
Fork
0
Súbory
Issues
0
Wiki
Branch:
main
Branche
Tagy
EP4CE15
cpu100mhz
fast-cpu-pipeline
main
FPGC6
/
Quartus
/
mainpll_sim
/
cadence
bart
9294ee0605
Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL.
1 rok pred
..
cds.lib
9294ee0605
Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL.
1 rok pred
hdl.var
9294ee0605
Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL.
1 rok pred
ncsim_setup.sh
9294ee0605
Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL.
1 rok pred