bart/FPGC6 @ f746bbd20d652f7fff8215c3fd2bac7de67c5dc1

bart 69d109e653 Added hardware signed and unsigned integer division and modulo. Created simple integer calculator to test. Updated several programs and BDOS to use new division hardware while keeping software calculation as legacy functions.		vor 1 Jahr
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mainpll	9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL.	vor 1 Jahr
mainpll_sim	9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL.	vor 1 Jahr
memory	7e81e7fa17 Added files missing from last commit (L1I cache).	vor 1 Jahr
modules	69d109e653 Added hardware signed and unsigned integer division and modulo. Created simple integer calculator to test. Updated several programs and BDOS to use new division hardware while keeping software calculation as legacy functions.	vor 1 Jahr
output_files	69d109e653 Added hardware signed and unsigned integer division and modulo. Created simple integer calculator to test. Updated several programs and BDOS to use new division hardware while keeping software calculation as legacy functions.	vor 1 Jahr
FPGC.qpf	e1bb01a621 Cleaned and renamed Quartus project.	vor 1 Jahr
FPGC.qsf	69d109e653 Added hardware signed and unsigned integer division and modulo. Created simple integer calculator to test. Updated several programs and BDOS to use new division hardware while keeping software calculation as legacy functions.	vor 1 Jahr
FPGC.qws	69d109e653 Added hardware signed and unsigned integer division and modulo. Created simple integer calculator to test. Updated several programs and BDOS to use new division hardware while keeping software calculation as legacy functions.	vor 1 Jahr
FPGC.sdc	e1bb01a621 Cleaned and renamed Quartus project.	vor 1 Jahr
ddr.ppf	a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work.	vor 2 Jahren
ddr.qip	a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work.	vor 2 Jahren
ddr.v	a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work.	vor 2 Jahren
ddr_bb.v	a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work.	vor 2 Jahren
mainpll.bsf	9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL.	vor 1 Jahr
mainpll.cmp	9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL.	vor 1 Jahr
mainpll.ppf	9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL.	vor 1 Jahr
mainpll.qip	9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL.	vor 1 Jahr
mainpll.sip	9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL.	vor 1 Jahr
mainpll.spd	9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL.	vor 1 Jahr
mainpll.v	9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL.	vor 1 Jahr
mainpll_sim.f	9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL.	vor 1 Jahr
output_file.cof	e1bb01a621 Cleaned and renamed Quartus project.	vor 1 Jahr