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greybox_tmp
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030e6c305e
More tests for 100mhz
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6 tháng trước cách đây |
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L1Dcache.v
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add43b75da
L2 cache at 100MHz now greatly increases performance. Attempted to create l1i and l1d cache, but becomes unstable and the issue is difficult to similate/replicate. Therefore, all l1 cache is now bypassed and the code can be found in l1cacheUnstable.v. As no l1 cache anymore, I removed some ccache statements to increase performance as this instruction currently does nothing.
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1 năm trước cách đây |
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L1Icache.v
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add43b75da
L2 cache at 100MHz now greatly increases performance. Attempted to create l1i and l1d cache, but becomes unstable and the issue is difficult to similate/replicate. Therefore, all l1 cache is now bypassed and the code can be found in l1cacheUnstable.v. As no l1 cache anymore, I removed some ccache statements to increase performance as this instruction currently does nothing.
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1 năm trước cách đây |
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L2cache.v
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f78729ea77
Fixed L2 cache state machine issue which was only present in the previous commit.
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1 năm trước cách đây |
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MemoryUnit.v
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0fd222280a
Added halfres rendering mode to gpu and mu. Added millis counter to mu. Raycaster now renders at half resolution and many improvements. Now at 40 to 70fps.
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1 năm trước cách đây |
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ROM.v
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b74702c915
Created full FPGC6 verilog simulation, added Quartus code from FPGC5 with CPU from FPGC6. Works in hardware, but has combination loop somewhere at the arbiter and the registerbank and stack are not using block ram
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2 năm trước cách đây |
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SDRAMcontroller.v
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28bcde6466
New SDRAM controller that uses both SDRAM chips. Now separate bus from MU for better performance, as controller runs at 100MHz. Also updated some debug code as debugging was needed. Tested working in hardware. 2x performance boost in some cases.
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1 năm trước cách đây |
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SPIreader.v
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b74702c915
Created full FPGC6 verilog simulation, added Quartus code from FPGC5 with CPU from FPGC6. Works in hardware, but has combination loop somewhere at the arbiter and the registerbank and stack are not using block ram
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2 năm trước cách đây |
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SRAM.v
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030e6c305e
More tests for 100mhz
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6 tháng trước cách đây |
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VRAM.v
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6e3cd7cd9c
PixelEngine now works in hardware with both HDMI and NTSC. Added pxtest and mandelbrot test programs.
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2 năm trước cách đây |
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qmegawiz_errors_log.txt
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030e6c305e
More tests for 100mhz
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6 tháng trước cách đây |
bartpleiter
030e6c305e
More tests for 100mhz