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bart
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FPGC6
mirror de https://github.com/bartpleiter/FPGC6
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Ramo: fast-cpu-pipeline
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FPGC6
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Quartus
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mainpll_sim
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synopsys
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vcs
bart 9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL. há 1 ano atrás
..
vcs_setup.sh 9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL. há 1 ano atrás