bart/FPGC6 @ f78729ea771ccf19d2e321c52468daa4e6cf5abb

bart f78729ea77 Fixed L2 cache state machine issue which was only present in the previous commit.		преди 1 година
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clkMux	e1bb01a621 Cleaned and renamed Quartus project.	преди 1 година
clock_pll_v	a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work.	преди 2 години
clock_pll_v_sim	e1bb01a621 Cleaned and renamed Quartus project.	преди 1 година
memory	7e81e7fa17 Added files missing from last commit (L1I cache).	преди 1 година
modules	f78729ea77 Fixed L2 cache state machine issue which was only present in the previous commit.	преди 1 година
output_files	f78729ea77 Fixed L2 cache state machine issue which was only present in the previous commit.	преди 1 година
FPGC.qpf	e1bb01a621 Cleaned and renamed Quartus project.	преди 1 година
FPGC.qsf	da2bff2ea2 Removed/disabled NTSC from design, as the tiny HDMI monitor is practically always used. Also greatly increased L2 cache size, although no performance benefits for the relatively small programs I currently use for benchmarking.	преди 1 година
FPGC.qws	f78729ea77 Fixed L2 cache state machine issue which was only present in the previous commit.	преди 1 година
FPGC.sdc	e1bb01a621 Cleaned and renamed Quartus project.	преди 1 година
NTSC_pll.ppf	da2bff2ea2 Removed/disabled NTSC from design, as the tiny HDMI monitor is practically always used. Also greatly increased L2 cache size, although no performance benefits for the relatively small programs I currently use for benchmarking.	преди 1 година
NTSC_pll.qip	b74702c915 Created full FPGC6 verilog simulation, added Quartus code from FPGC5 with CPU from FPGC6. Works in hardware, but has combination loop somewhere at the arbiter and the registerbank and stack are not using block ram	преди 2 години
NTSC_pll.v	da2bff2ea2 Removed/disabled NTSC from design, as the tiny HDMI monitor is practically always used. Also greatly increased L2 cache size, although no performance benefits for the relatively small programs I currently use for benchmarking.	преди 1 година
NTSC_pll_bb.v	da2bff2ea2 Removed/disabled NTSC from design, as the tiny HDMI monitor is practically always used. Also greatly increased L2 cache size, although no performance benefits for the relatively small programs I currently use for benchmarking.	преди 1 година
clkMux.qsys	a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work.	преди 2 години
clkMux.sopcinfo	a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work.	преди 2 години
clock_pll.ppf	da2bff2ea2 Removed/disabled NTSC from design, as the tiny HDMI monitor is practically always used. Also greatly increased L2 cache size, although no performance benefits for the relatively small programs I currently use for benchmarking.	преди 1 година
clock_pll.qip	b74702c915 Created full FPGC6 verilog simulation, added Quartus code from FPGC5 with CPU from FPGC6. Works in hardware, but has combination loop somewhere at the arbiter and the registerbank and stack are not using block ram	преди 2 години
clock_pll.v	da2bff2ea2 Removed/disabled NTSC from design, as the tiny HDMI monitor is practically always used. Also greatly increased L2 cache size, although no performance benefits for the relatively small programs I currently use for benchmarking.	преди 1 година
clock_pll_bb.v	da2bff2ea2 Removed/disabled NTSC from design, as the tiny HDMI monitor is practically always used. Also greatly increased L2 cache size, although no performance benefits for the relatively small programs I currently use for benchmarking.	преди 1 година
clock_pll_v.cmp	a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work.	преди 2 години
clock_pll_v.qip	a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work.	преди 2 години
clock_pll_v.sip	a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work.	преди 2 години
clock_pll_v.spd	a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work.	преди 2 години
clock_pll_v.v	a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work.	преди 2 години
ddr.ppf	a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work.	преди 2 години
ddr.qip	a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work.	преди 2 години
ddr.v	a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work.	преди 2 години
ddr_bb.v	a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work.	преди 2 години
output_file.cof	e1bb01a621 Cleaned and renamed Quartus project.	преди 1 година