FPGC_50.gtkw 5.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315
  1. [*]
  2. [*] GTKWave Analyzer v3.3.107 (w)1999-2020 BSI
  3. [*] Sat Sep 2 21:10:16 2023
  4. [*]
  5. [dumpfile] "/home/bart/Documents/FPGA/FPGC6/Verilog/output/wave.vcd"
  6. [dumpfile_mtime] "Sat Sep 2 16:09:11 2023"
  7. [dumpfile_size] 46133170
  8. [savefile] "/home/bart/Documents/FPGA/FPGC6/Verilog/output/FPGC.gtkw"
  9. [timestart] 25540000
  10. [size] 1920 1054
  11. [pos] -1 -1
  12. *-21.666576 1263700 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
  13. [treeopen] FPGC_tb.
  14. [treeopen] FPGC_tb.fpgc.
  15. [treeopen] FPGC_tb.fpgc.cpu.arbiter.
  16. [sst_width] 227
  17. [signals_width] 366
  18. [sst_expanded] 1
  19. [sst_vpaned_height] 494
  20. @28
  21. FPGC_tb.fpgc.clk
  22. @22
  23. FPGC_tb.fpgc.cpu.PC[26:0]
  24. @200
  25. -
  26. -
  27. -Arbiter
  28. -
  29. @22
  30. FPGC_tb.fpgc.cpu.arbiter.addr_a[31:0]
  31. FPGC_tb.fpgc.cpu.arbiter.data_a[31:0]
  32. @28
  33. FPGC_tb.fpgc.cpu.arbiter.we_a
  34. FPGC_tb.fpgc.cpu.arbiter.start_a
  35. FPGC_tb.fpgc.cpu.arbiter.done_a
  36. @22
  37. FPGC_tb.fpgc.cpu.arbiter.q[31:0]
  38. @200
  39. -
  40. -
  41. @22
  42. FPGC_tb.fpgc.cpu.arbiter.addr_b[31:0]
  43. FPGC_tb.fpgc.cpu.arbiter.data_b[31:0]
  44. @28
  45. FPGC_tb.fpgc.cpu.arbiter.we_b
  46. FPGC_tb.fpgc.cpu.arbiter.start_b
  47. FPGC_tb.fpgc.cpu.arbiter.done_b
  48. @22
  49. FPGC_tb.fpgc.cpu.arbiter.q[31:0]
  50. @200
  51. -
  52. -
  53. @22
  54. FPGC_tb.fpgc.cpu.arbiter.bus_addr[26:0]
  55. FPGC_tb.fpgc.cpu.arbiter.bus_data[31:0]
  56. @28
  57. FPGC_tb.fpgc.cpu.arbiter.bus_we
  58. FPGC_tb.fpgc.cpu.arbiter.bus_start
  59. @29
  60. FPGC_tb.fpgc.cpu.arbiter.bus_done
  61. @200
  62. -
  63. -
  64. @24
  65. FPGC_tb.fpgc.cpu.arbiter.state[2:0]
  66. @200
  67. -
  68. -
  69. -
  70. -
  71. -
  72. -
  73. @22
  74. FPGC_tb.fpgc.cpu.arbiter_bus_addr[26:0]
  75. FPGC_tb.fpgc.cpu.arbiter_bus_data[31:0]
  76. @28
  77. FPGC_tb.fpgc.cpu.arbiter_bus_start
  78. FPGC_tb.fpgc.cpu.arbiter_bus_we
  79. @22
  80. FPGC_tb.fpgc.cpu.arbiter_bus_q[31:0]
  81. @28
  82. FPGC_tb.fpgc.cpu.arbiter_bus_done
  83. @200
  84. -
  85. @22
  86. FPGC_tb.fpgc.cpu.bus_addr[26:0]
  87. FPGC_tb.fpgc.cpu.bus_data[31:0]
  88. @28
  89. FPGC_tb.fpgc.cpu.bus_we
  90. FPGC_tb.fpgc.cpu.bus_start
  91. @22
  92. FPGC_tb.fpgc.cpu.bus_q[31:0]
  93. @28
  94. FPGC_tb.fpgc.cpu.bus_done
  95. @200
  96. -
  97. @22
  98. FPGC_tb.fpgc.cpu.sdc_addr[23:0]
  99. FPGC_tb.fpgc.cpu.sdc_data[31:0]
  100. @28
  101. FPGC_tb.fpgc.cpu.sdc_we
  102. FPGC_tb.fpgc.cpu.sdc_start
  103. @22
  104. FPGC_tb.fpgc.cpu.sdc_q[31:0]
  105. @28
  106. FPGC_tb.fpgc.cpu.sdc_done
  107. @200
  108. -
  109. -SDRAMcontroller
  110. @24
  111. FPGC_tb.fpgc.sdramcontroller.sdc_addr[23:0]
  112. @22
  113. FPGC_tb.fpgc.sdramcontroller.sdc_data[31:0]
  114. @28
  115. FPGC_tb.fpgc.sdramcontroller.sdc_we
  116. FPGC_tb.fpgc.sdramcontroller.sdc_start
  117. FPGC_tb.fpgc.sdramcontroller.sdc_done
  118. @24
  119. FPGC_tb.fpgc.sdramcontroller.state[4:0]
  120. @28
  121. FPGC_tb.fpgc.sdramcontroller.is_refreshing
  122. @22
  123. FPGC_tb.fpgc.sdramcontroller.sdc_q[31:0]
  124. @200
  125. -
  126. -
  127. @22
  128. FPGC_tb.fpgc.sdramcontroller.SDRAM_A[12:0]
  129. @28
  130. FPGC_tb.fpgc.sdramcontroller.SDRAM_BA[1:0]
  131. FPGC_tb.fpgc.sdramcontroller.SDRAM_CASn
  132. FPGC_tb.fpgc.sdramcontroller.SDRAM_CKE
  133. @22
  134. FPGC_tb.fpgc.sdramcontroller.SDRAM_CMD[3:0]
  135. @28
  136. FPGC_tb.fpgc.sdramcontroller.SDRAM_CSn
  137. @22
  138. FPGC_tb.fpgc.sdramcontroller.SDRAM_DATA[31:0]
  139. FPGC_tb.fpgc.sdramcontroller.SDRAM_DQM[3:0]
  140. FPGC_tb.fpgc.sdramcontroller.SDRAM_DQ[31:0]
  141. @28
  142. FPGC_tb.fpgc.sdramcontroller.SDRAM_DQ_OE
  143. @22
  144. FPGC_tb.fpgc.sdramcontroller.SDRAM_Q[31:0]
  145. @28
  146. FPGC_tb.fpgc.sdramcontroller.SDRAM_RASn
  147. FPGC_tb.fpgc.sdramcontroller.SDRAM_WEn
  148. @200
  149. -
  150. -SPI flash
  151. @28
  152. FPGC_tb.spiFlash.CLK
  153. FPGC_tb.spiFlash.CSn
  154. FPGC_tb.spiFlash.DIO
  155. FPGC_tb.spiFlash.DO
  156. FPGC_tb.spiFlash.HOLDn
  157. FPGC_tb.spiFlash.WPn
  158. @200
  159. -
  160. -
  161. -MU
  162. @22
  163. FPGC_tb.fpgc.mu.bus_addr[26:0]
  164. FPGC_tb.fpgc.mu.bus_d_reg[31:0]
  165. FPGC_tb.fpgc.mu.bus_data[31:0]
  166. @28
  167. FPGC_tb.fpgc.mu.bus_done
  168. FPGC_tb.fpgc.mu.bus_done_next
  169. @22
  170. FPGC_tb.fpgc.mu.bus_q[31:0]
  171. FPGC_tb.fpgc.mu.bus_q_wire[31:0]
  172. FPGC_tb.fpgc.mu.bus_q_wire_reg[31:0]
  173. @28
  174. FPGC_tb.fpgc.mu.bus_start
  175. FPGC_tb.fpgc.mu.bus_we
  176. @200
  177. -
  178. -
  179. -Fetch
  180. @28
  181. FPGC_tb.fpgc.cpu.instr_DE[31:0]
  182. @24
  183. FPGC_tb.fpgc.cpu.pc_FE[31:0]
  184. @28
  185. FPGC_tb.fpgc.cpu.instr_hit_FE
  186. @200
  187. -
  188. @28
  189. FPGC_tb.fpgc.cpu.intDisabled
  190. @22
  191. FPGC_tb.fpgc.cpu.interruptValid
  192. FPGC_tb.fpgc.cpu.pc_FE[31:0]
  193. FPGC_tb.fpgc.cpu.pc_FE_backup[31:0]
  194. FPGC_tb.fpgc.cpu.PC_backup_current[31:0]
  195. @200
  196. -
  197. @28
  198. FPGC_tb.fpgc.cpu.instr_MEM[31:0]
  199. FPGC_tb.fpgc.cpu.jumpc_MEM
  200. FPGC_tb.fpgc.cpu.branch_passed_MEM
  201. @24
  202. FPGC_tb.fpgc.cpu.jump_addr_MEM[31:0]
  203. @200
  204. -
  205. @22
  206. FPGC_tb.fpgc.mu.bus_addr[26:0]
  207. @28
  208. FPGC_tb.fpgc.mu.bus_start
  209. @22
  210. FPGC_tb.fpgc.mu.bus_q[31:0]
  211. FPGC_tb.fpgc.mu.bus_q_wire[31:0]
  212. @28
  213. FPGC_tb.fpgc.mu.bus_done_next
  214. @22
  215. FPGC_tb.fpgc.mu.bus_q_wire_reg[31:0]
  216. @28
  217. FPGC_tb.fpgc.mu.bus_done
  218. @22
  219. FPGC_tb.fpgc.mu.UART0_rx.o_Rx_Byte[7:0]
  220. @200
  221. -
  222. @22
  223. FPGC_tb.DIPS[3:0]
  224. @28
  225. FPGC_tb.fpgc.cpu.intDisabled
  226. FPGC_tb.fpgc.cpu.interruptValid
  227. @200
  228. -InstrMem
  229. @28
  230. FPGC_tb.fpgc.cpu.instrMem.clk
  231. @200
  232. -
  233. @24
  234. FPGC_tb.fpgc.cpu.instrMem.addr[31:0]
  235. @22
  236. FPGC_tb.fpgc.cpu.instrMem.q[31:0]
  237. @28
  238. FPGC_tb.fpgc.cpu.instrMem.ignoreNext
  239. FPGC_tb.fpgc.cpu.instrMem.clear
  240. FPGC_tb.fpgc.cpu.instrMem.hit
  241. FPGC_tb.fpgc.cpu.instrMem.hold
  242. @200
  243. -
  244. @22
  245. FPGC_tb.fpgc.cpu.instrMem.bus_addr[31:0]
  246. FPGC_tb.fpgc.cpu.instrMem.bus_data[31:0]
  247. @28
  248. FPGC_tb.fpgc.cpu.instrMem.bus_done
  249. @22
  250. FPGC_tb.fpgc.cpu.instrMem.bus_q[31:0]
  251. @28
  252. FPGC_tb.fpgc.cpu.instrMem.bus_start
  253. FPGC_tb.fpgc.cpu.instrMem.bus_we
  254. @200
  255. -
  256. -
  257. @28
  258. FPGC_tb.fpgc.cpu.clearCache_DE
  259. FPGC_tb.fpgc.cpu.clearCache_EX
  260. FPGC_tb.fpgc.cpu.clearCache_MEM
  261. @200
  262. -
  263. -
  264. -
  265. -DataMem
  266. @22
  267. FPGC_tb.fpgc.cpu.dataMem.bus_addr[31:0]
  268. FPGC_tb.fpgc.cpu.dataMem.bus_data[31:0]
  269. FPGC_tb.fpgc.cpu.dataMem.bus_q[31:0]
  270. @28
  271. FPGC_tb.fpgc.cpu.dataMem.bus_we
  272. FPGC_tb.fpgc.cpu.dataMem.bus_start
  273. FPGC_tb.fpgc.cpu.dataMem.bus_done
  274. @200
  275. -
  276. @24
  277. FPGC_tb.fpgc.cpu.dataMem.bus_addr[31:0]
  278. @28
  279. FPGC_tb.fpgc.cpu.dataMem.busy
  280. @22
  281. FPGC_tb.fpgc.cpu.dataMem.qreg[31:0]
  282. FPGC_tb.fpgc.cpu.dataMem.q[31:0]
  283. @200
  284. -
  285. -
  286. -
  287. -
  288. @28
  289. FPGC_tb.fpgc.cpu.clearCache_DE
  290. FPGC_tb.fpgc.cpu.clearCache_EX
  291. FPGC_tb.fpgc.cpu.clearCache_MEM
  292. @200
  293. -
  294. -L2Cache
  295. @24
  296. FPGC_tb.fpgc.l2cache.state[2:0]
  297. FPGC_tb.fpgc.l2cache.clear_cache_counter[15:0]
  298. @200
  299. -
  300. @28
  301. FPGC_tb.fpgc.l2cache.start_registered
  302. @24
  303. FPGC_tb.fpgc.l2cache.cache_addr[9:0]
  304. @22
  305. FPGC_tb.fpgc.l2cache.cache_d[46:0]
  306. @28
  307. FPGC_tb.fpgc.l2cache.cache_we
  308. @22
  309. FPGC_tb.fpgc.l2cache.cache_q[46:0]
  310. @200
  311. -
  312. -
  313. -
  314. [pattern_trace] 1
  315. [pattern_trace] 0