FSX.v 6.6 KB

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  1. /*
  2. * Graphical processor (Frame Synthesizer)
  3. * Generates video from VRAM
  4. */
  5. module FSX(
  6. //Clocks
  7. input clkPixel,
  8. input clkTMDShalf,
  9. //input clk14,
  10. //input clk114,
  11. input clkMuxOut,
  12. //HDMI
  13. output [3:0] TMDS_p,
  14. output [3:0] TMDS_n,
  15. //NTSC composite
  16. //output [7:0] composite,
  17. //Select output method
  18. //input selectOutput,
  19. input halfRes,
  20. //VRAM32
  21. output [13:0] vram32_addr,
  22. input [31:0] vram32_q,
  23. //VRAM322
  24. output [13:0] vram322_addr,
  25. input [31:0] vram322_q,
  26. //VRAM8
  27. output [13:0] vram8_addr,
  28. input [7:0] vram8_q,
  29. //VRAMSPR
  30. output [13:0] vramSPR_addr,
  31. input [8:0] vramSPR_q,
  32. //VRAMpixel
  33. output [16:0] vramPX_addr,
  34. input [23:0] vramPX_q,
  35. //Interrupt signal
  36. output frameDrawn
  37. );
  38. wire selectOutput = 1'b1; // always HDMI, as I no longer wish to include NTSC as a tiny HDMI monitor is now used as primary display
  39. wire [11:0] h_count_hdmi;
  40. wire [11:0] v_count_hdmi;
  41. wire hsync_hdmi;
  42. wire vsync_hdmi;
  43. wire csync;
  44. wire blank_hdmi;
  45. wire frameDrawn_hdmi;
  46. TimingGenerator timingGenerator(
  47. // Clock
  48. .clkPixel(clkPixel),
  49. // Position counters
  50. .h_count(h_count_hdmi),
  51. .v_count(v_count_hdmi),
  52. // Video signals
  53. .hsync(hsync_hdmi),
  54. .vsync(vsync_hdmi),
  55. .csync(csync),
  56. .blank(blank_hdmi),
  57. // Interrupt signal
  58. .frameDrawn(frameDrawn_hdmi)
  59. );
  60. /*
  61. wire [2:0] r_ntsc;
  62. wire [2:0] g_ntsc;
  63. wire [1:0] b_ntsc;
  64. wire frameDrawn_ntsc;
  65. wire [11:0] h_count_ntsc;
  66. wire [11:0] v_count_ntsc;
  67. wire hsync_ntsc;
  68. wire vsync_ntsc;
  69. wire blank_ntsc;
  70. RGB332toNTSC rgb2ntsc(
  71. .clk(clk14), //14.318MHz
  72. .clkColor(clk114), //114.5454MHz
  73. .r(r_ntsc),
  74. .g(g_ntsc),
  75. .b(b_ntsc),
  76. .hcount(h_count_ntsc),
  77. .vcount(v_count_ntsc),
  78. .hs(hsync_ntsc),
  79. .vs(vsync_ntsc),
  80. .blank(blank_ntsc),
  81. .composite(composite), // video output signal
  82. .frameDrawn(frameDrawn_ntsc) // interrupt signal
  83. );
  84. */
  85. wire hsync;
  86. wire vsync;
  87. wire blank;
  88. wire [11:0] h_count;
  89. wire [11:0] v_count;
  90. /*
  91. assign frameDrawn = (selectOutput == 1'b1) ? frameDrawn_hdmi : frameDrawn_ntsc;
  92. assign hsync = (selectOutput == 1'b1) ? hsync_hdmi : hsync_ntsc;
  93. assign vsync = (selectOutput == 1'b1) ? vsync_hdmi : ~vsync_ntsc; // ntsc vsync is inverted
  94. assign blank = (selectOutput == 1'b1) ? blank_hdmi : blank_ntsc;
  95. assign h_count = (selectOutput == 1'b1) ? h_count_hdmi : h_count_ntsc;
  96. assign v_count = (selectOutput == 1'b1) ? v_count_hdmi : v_count_ntsc;
  97. */
  98. assign frameDrawn = frameDrawn_hdmi;
  99. assign hsync = hsync_hdmi;
  100. assign vsync = vsync_hdmi;
  101. assign blank = blank_hdmi;
  102. assign h_count = h_count_hdmi;
  103. assign v_count = v_count_hdmi;
  104. wire [2:0] BGW_r;
  105. wire [2:0] BGW_g;
  106. wire [1:0] BGW_b;
  107. BGWrenderer bgwrenderer(
  108. // Video I/O
  109. .clk(clkMuxOut),
  110. .hs(hsync),
  111. .vs(vsync),
  112. .blank(blank),
  113. .scale2x(selectOutput),
  114. // Output colors
  115. .r(BGW_r),
  116. .g(BGW_g),
  117. .b(BGW_b),
  118. .h_count(h_count), // line position in pixels including blanking
  119. .v_count(v_count), // frame position in lines including blanking
  120. // VRAM32
  121. .vram32_addr(vram32_addr),
  122. .vram32_q(vram32_q),
  123. // VRAM8
  124. .vram8_addr(vram8_addr),
  125. .vram8_q(vram8_q)
  126. );
  127. wire [7:0] PX_r;
  128. wire [7:0] PX_g;
  129. wire [7:0] PX_b;
  130. PixelEngine pixelEngine(
  131. // Video I/O
  132. .clk(clkMuxOut),
  133. .hs(hsync),
  134. .vs(vsync),
  135. .blank(blank),
  136. .scale2x(selectOutput),
  137. .halfRes(halfRes),
  138. // Output colors
  139. .r(PX_r),
  140. .g(PX_g),
  141. .b(PX_b),
  142. .h_count(h_count), // line position in pixels including blanking
  143. .v_count(v_count), // frame position in lines including blanking
  144. // VRAM
  145. .vram_addr(vramPX_addr),
  146. .vram_q(vramPX_q)
  147. );
  148. // Give priority to pixel plane if bgw plane is black
  149. wire pxPriority = (BGW_r == 3'd0 && BGW_g == 3'd0 && BGW_b == 2'd0);
  150. wire [7:0] BGW_r_Byte;
  151. wire [7:0] BGW_g_Byte;
  152. wire [7:0] BGW_b_Byte;
  153. assign BGW_r_Byte = (BGW_r == 3'd0) ? {BGW_r, 5'b00000} : {BGW_r, 5'b11111};
  154. assign BGW_g_Byte = (BGW_g == 3'd0) ? {BGW_g, 5'b00000} : {BGW_g, 5'b11111};
  155. assign BGW_b_Byte = (BGW_b == 2'd0) ? {BGW_b, 6'b000000} : {BGW_b, 6'b111111};
  156. wire [7:0] rByte;
  157. wire [7:0] gByte;
  158. wire [7:0] bByte;
  159. assign rByte = (pxPriority) ? PX_r: BGW_r_Byte;
  160. assign gByte = (pxPriority) ? PX_g: BGW_g_Byte;
  161. assign bByte = (pxPriority) ? PX_b : BGW_b_Byte;
  162. // Convert VGA signal to HDMI signals
  163. RGB2HDMI rgb2hdmi(
  164. .clkTMDS(clkTMDShalf),
  165. .clkRGB (clkPixel),
  166. .rRGB (rByte),
  167. .gRGB (gByte),
  168. .bRGB (bByte),
  169. .blk (blank_hdmi),
  170. .hs (hsync_hdmi),
  171. .vs (vsync_hdmi),
  172. .bTMDS (TMDS_p[0]),
  173. .gTMDS (TMDS_p[1]),
  174. .rTMDS (TMDS_p[2]),
  175. .cTMDS (TMDS_p[3]),
  176. .bTMDSn (TMDS_n[0]),
  177. .gTMDSn (TMDS_n[1]),
  178. .rTMDSn (TMDS_n[2]),
  179. .cTMDSn (TMDS_n[3])
  180. );
  181. /*
  182. // Image file generator for simulation
  183. integer file;
  184. integer framecounter = 0;
  185. // HDMI
  186. always @(negedge vsync_hdmi)
  187. begin
  188. if (selectOutput == 1'b1)
  189. begin
  190. file = $fopen($sformatf("/home/bart/Documents/FPGA/FPGC6/Verilog/output/frame%0d.ppm", framecounter), "w");
  191. $fwrite(file, "P3\n");
  192. $fwrite(file, "640 480\n");
  193. $fwrite(file, "255\n");
  194. framecounter = framecounter + 1;
  195. end
  196. end
  197. always @(posedge clkPixel)
  198. begin
  199. if (selectOutput == 1'b1)
  200. begin
  201. if (~blank_hdmi)
  202. begin
  203. $fwrite(file, "%d %d %d\n", rByte, gByte, bByte);
  204. end
  205. end
  206. end
  207. */
  208. /*
  209. wire [7:0] rByte_ntsc;
  210. wire [7:0] gByte_ntsc;
  211. wire [7:0] bByte_ntsc;
  212. assign rByte_ntsc = (r_ntsc == 3'd0) ? {r_ntsc, 5'b00000} : {r_ntsc, 5'b11111};
  213. assign gByte_ntsc = (g_ntsc == 3'd0) ? {g_ntsc, 5'b00000} : {g_ntsc, 5'b11111};
  214. assign bByte_ntsc = (b_ntsc == 2'd0) ? {b_ntsc, 6'b000000} : {b_ntsc, 6'b111111};
  215. // NTSC
  216. always @(negedge vsync_ntsc)
  217. begin
  218. if (selectOutput == 1'b0)
  219. begin
  220. file = $fopen($sformatf("/home/bart/Documents/FPGA/FPGC6/Verilog/output/frame%0d.ppm", framecounter), "w");
  221. $fwrite(file, "P3\n");
  222. $fwrite(file, "320 240\n");
  223. $fwrite(file, "255\n");
  224. framecounter = framecounter + 1;
  225. end
  226. end
  227. always @(posedge clkPixel)
  228. begin
  229. if (selectOutput == 1'b0)
  230. begin
  231. if (~blank_ntsc)
  232. begin
  233. $fwrite(file, "%d %d %d\n", rByte_ntsc, gByte_ntsc, bByte_ntsc);
  234. end
  235. end
  236. end
  237. */
  238. endmodule