clock_pll.qip 436 B

123456
  1. set_global_assignment -name IP_TOOL_NAME "ALTPLL"
  2. set_global_assignment -name IP_TOOL_VERSION "21.1"
  3. set_global_assignment -name IP_GENERATED_DEVICE_FAMILY "{Cyclone IV E}"
  4. set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "clock_pll.v"]
  5. set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "clock_pll_bb.v"]
  6. set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "clock_pll.ppf"]