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bart
/
FPGC6
огледало од https://github.com/bartpleiter/FPGC6
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Дрво: 9ac6dafd0f
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FPGC6
/
Quartus
bart 69d109e653 Added hardware signed and unsigned integer division and modulo. Created simple integer calculator to test. Updated several programs and BDOS to use new division hardware while keeping software calculation as legacy functions. пре 1 година
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mainpll 9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL. пре 1 година
mainpll_sim 9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL. пре 1 година
memory 7e81e7fa17 Added files missing from last commit (L1I cache). пре 1 година
modules 69d109e653 Added hardware signed and unsigned integer division and modulo. Created simple integer calculator to test. Updated several programs and BDOS to use new division hardware while keeping software calculation as legacy functions. пре 1 година
output_files 69d109e653 Added hardware signed and unsigned integer division and modulo. Created simple integer calculator to test. Updated several programs and BDOS to use new division hardware while keeping software calculation as legacy functions. пре 1 година
FPGC.qpf e1bb01a621 Cleaned and renamed Quartus project. пре 1 година
FPGC.qsf 69d109e653 Added hardware signed and unsigned integer division and modulo. Created simple integer calculator to test. Updated several programs and BDOS to use new division hardware while keeping software calculation as legacy functions. пре 1 година
FPGC.qws 69d109e653 Added hardware signed and unsigned integer division and modulo. Created simple integer calculator to test. Updated several programs and BDOS to use new division hardware while keeping software calculation as legacy functions. пре 1 година
FPGC.sdc e1bb01a621 Cleaned and renamed Quartus project. пре 1 година
ddr.ppf a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work. пре 2 година
ddr.qip a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work. пре 2 година
ddr.v a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work. пре 2 година
ddr_bb.v a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work. пре 2 година
mainpll.bsf 9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL. пре 1 година
mainpll.cmp 9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL. пре 1 година
mainpll.ppf 9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL. пре 1 година
mainpll.qip 9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL. пре 1 година
mainpll.sip 9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL. пре 1 година
mainpll.spd 9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL. пре 1 година
mainpll.v 9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL. пре 1 година
mainpll_sim.f 9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL. пре 1 година
output_file.cof e1bb01a621 Cleaned and renamed Quartus project. пре 1 година