bart/FPGC6 @ 7cfd77a292a96987d6b7c1b5f17f187fc8c4f10a

bart 4e7cdb1216 Changed pixelplane to 24 bit colors. Updated texture generator and raycaster to 24 bit color.		1 anno fa
..
mainpll	9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL.	1 anno fa
mainpll_sim	9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL.	1 anno fa
memory	7e81e7fa17 Added files missing from last commit (L1I cache).	1 anno fa
modules	4e7cdb1216 Changed pixelplane to 24 bit colors. Updated texture generator and raycaster to 24 bit color.	1 anno fa
output_files	4e7cdb1216 Changed pixelplane to 24 bit colors. Updated texture generator and raycaster to 24 bit color.	1 anno fa
FPGC.qpf	e1bb01a621 Cleaned and renamed Quartus project.	1 anno fa
FPGC.qsf	69d109e653 Added hardware signed and unsigned integer division and modulo. Created simple integer calculator to test. Updated several programs and BDOS to use new division hardware while keeping software calculation as legacy functions.	1 anno fa
FPGC.qws	4e7cdb1216 Changed pixelplane to 24 bit colors. Updated texture generator and raycaster to 24 bit color.	1 anno fa
FPGC.sdc	e1bb01a621 Cleaned and renamed Quartus project.	1 anno fa
ddr.ppf	a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work.	2 anni fa
ddr.qip	a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work.	2 anni fa
ddr.v	a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work.	2 anni fa
ddr_bb.v	a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work.	2 anni fa
mainpll.bsf	9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL.	1 anno fa
mainpll.cmp	9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL.	1 anno fa
mainpll.ppf	9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL.	1 anno fa
mainpll.qip	9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL.	1 anno fa
mainpll.sip	9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL.	1 anno fa
mainpll.spd	9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL.	1 anno fa
mainpll.v	9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL.	1 anno fa
mainpll_sim.f	9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL.	1 anno fa
output_file.cof	e1bb01a621 Cleaned and renamed Quartus project.	1 anno fa