提交歷史

作者 SHA1 備註 提交日期
  bartpleiter 030e6c305e More tests for 100mhz 5 月之前
  bart 0fd222280a Added halfres rendering mode to gpu and mu. Added millis counter to mu. Raycaster now renders at half resolution and many improvements. Now at 40 to 70fps. 1 年之前
  bart 69d109e653 Added hardware signed and unsigned integer division and modulo. Created simple integer calculator to test. Updated several programs and BDOS to use new division hardware while keeping software calculation as legacy functions. 1 年之前
  bart f3f3a43044 Added fixed-point signed divider to MU. Integrated into FPCALC. 1 年之前
  bart 9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL. 1 年之前
  bart da2bff2ea2 Removed/disabled NTSC from design, as the tiny HDMI monitor is practically always used. Also greatly increased L2 cache size, although no performance benefits for the relatively small programs I currently use for benchmarking. 1 年之前
  bart add43b75da L2 cache at 100MHz now greatly increases performance. Attempted to create l1i and l1d cache, but becomes unstable and the issue is difficult to similate/replicate. Therefore, all l1 cache is now bypassed and the code can be found in l1cacheUnstable.v. As no l1 cache anymore, I removed some ccache statements to increase performance as this instruction currently does nothing. 1 年之前
  bart b6831c4209 Added L2 cache (no L1 for now) between CPU and SDRAM controller. No noticable performance difference, can likely be optimized further to reduce cache hit latency. 1 年之前
  bart e1bb01a621 Cleaned and renamed Quartus project. 1 年之前