提交歷史

作者 SHA1 備註 提交日期
  bart 0fd222280a Added halfres rendering mode to gpu and mu. Added millis counter to mu. Raycaster now renders at half resolution and many improvements. Now at 40 to 70fps. 1 年之前
  bart 4e7cdb1216 Changed pixelplane to 24 bit colors. Updated texture generator and raycaster to 24 bit color. 1 年之前
  bart 9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL. 1 年之前
  bart da2bff2ea2 Removed/disabled NTSC from design, as the tiny HDMI monitor is practically always used. Also greatly increased L2 cache size, although no performance benefits for the relatively small programs I currently use for benchmarking. 1 年之前
  bart add43b75da L2 cache at 100MHz now greatly increases performance. Attempted to create l1i and l1d cache, but becomes unstable and the issue is difficult to similate/replicate. Therefore, all l1 cache is now bypassed and the code can be found in l1cacheUnstable.v. As no l1 cache anymore, I removed some ccache statements to increase performance as this instruction currently does nothing. 1 年之前
  bart 9a6bf3cd52 Improved reset for cache. Disabled l2 cache as it currently reduces performance. Added more CCache instructions to code, although likely not needed. Still instability issues when L1I cache is enabled. 1 年之前
  bart b6831c4209 Added L2 cache (no L1 for now) between CPU and SDRAM controller. No noticable performance difference, can likely be optimized further to reduce cache hit latency. 1 年之前
  bart 28bcde6466 New SDRAM controller that uses both SDRAM chips. Now separate bus from MU for better performance, as controller runs at 100MHz. Also updated some debug code as debugging was needed. Tested working in hardware. 2x performance boost in some cases. 1 年之前
  bart e1bb01a621 Cleaned and renamed Quartus project. 1 年之前