Commit History

Автор SHA1 Съобщение Дата
  bart 01a00e1603 Update new repo link, add requirements.txt. преди 8 месеца
  bart d6f7dcb26d Added initial code for BRFS (custom RAM filesystem). преди 8 месеца
  bart 0fd222280a Added halfres rendering mode to gpu and mu. Added millis counter to mu. Raycaster now renders at half resolution and many improvements. Now at 40 to 70fps. преди 1 година
  bart 7cfd77a292 Added fps counter to raycaster преди 1 година
  bart 33d828b6b9 All rendering of textured raycaster now done in assembly for significant speed improvement. преди 1 година
  bart d2b53bb5e8 Added dark side of wall in raycaster. Moved data to data folder. Minor code improvements and prep for assembly screen render function. преди 1 година
  bart 4e7cdb1216 Changed pixelplane to 24 bit colors. Updated texture generator and raycaster to 24 bit color. преди 1 година
  bart 55b5818582 Textured raycaster is now fast enough for a demo. преди 1 година
  bart 9ac6dafd0f POC texture rendering in raycaster. No code optimization yet so it is very slow. преди 1 година
  bart f746bbd20d Added movement to raycaster. Speed improvements to raycaster and script to precalculate direction and plane values for rotation, for each degree. преди 1 година
  bart 0eba720aeb Initial working POC of a simple raycaster engine. преди 1 година
  bart 69d109e653 Added hardware signed and unsigned integer division and modulo. Created simple integer calculator to test. Updated several programs and BDOS to use new division hardware while keeping software calculation as legacy functions. преди 1 година
  bart f3f3a43044 Added fixed-point signed divider to MU. Integrated into FPCALC. преди 1 година
  bart ddd3d60235 Added Fixed-Point BCC library, including a FPCALC application to test it. MULTFP instruction is added to assembler, and some library functions were added during development. преди 1 година
  bart 3af9eecaa9 Added signed fixed point multiplication to ALU. преди 1 година
  bart 9294ee0605 Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL. преди 1 година
  bart f78729ea77 Fixed L2 cache state machine issue which was only present in the previous commit. преди 1 година
  bart 82a433530c Reverted L2 cache size to 1024 words for easier debugging. преди 1 година
  bart da2bff2ea2 Removed/disabled NTSC from design, as the tiny HDMI monitor is practically always used. Also greatly increased L2 cache size, although no performance benefits for the relatively small programs I currently use for benchmarking. преди 1 година
  bart 2287e54c6b Integrated valid bits into cache block ram. Reset now iteratively clears the entire cache. Allows for much lower FPGA usage and better timings. Should be able to greatly increase cache size as there is an abundance of BRAM. преди 1 година
  bart 2fe0518bb3 Improved interrupt timing/alignment, fixing bug where interrupts are not allowed during the UART bootloader. преди 1 година
  bart 52f2819774 Removed leftover ccache instructions from debugging instability problems. Commented out required ccache instructions for when L1I cache returns in the future. преди 1 година
  bart 9a285550c0 Updated documentation a bit, added newlines to BENCH, removed wrong comments from L2cache.v преди 1 година
  bart 88681ec5d0 New arbiter that further improves performance by removing latency for instruction memory access. Created instability again, which I found to be caused by bad interrupt timings. Fixed by changing the interruptValid wire to use branch_MEM for alignment. I do not know why this fixed all problems as it is very hard to simulate this issue. L1 cache should be possible again! преди 1 година
  bart add43b75da L2 cache at 100MHz now greatly increases performance. Attempted to create l1i and l1d cache, but becomes unstable and the issue is difficult to similate/replicate. Therefore, all l1 cache is now bypassed and the code can be found in l1cacheUnstable.v. As no l1 cache anymore, I removed some ccache statements to increase performance as this instruction currently does nothing. преди 1 година
  bart 5af536210d Fixed instability by adding clear cache instruction during SPI transfer. No idea why this fixed the issue, as the I/O address range is above the limit for cache to work. преди 1 година
  bart 9a6bf3cd52 Improved reset for cache. Disabled l2 cache as it currently reduces performance. Added more CCache instructions to code, although likely not needed. Still instability issues when L1I cache is enabled. преди 1 година
  bart 7e81e7fa17 Added files missing from last commit (L1I cache). преди 1 година
  bart 3253b1bc2c Added L1I cache. Added clear cache instruction, which is now added in the UART bootloader and BDOS program loaders. Fixed too fast read part in SPI flasher. Snake userbdos program now sometimes crashes, which needs further investigation. преди 1 година
  bart dfb3bbb48e Added L1D cache. Currently only works stable when valid bit is set 0 on WRITE. Valid bit 1 after cache miss read works fine for some reason. преди 1 година