Página Principal Explorar Ajuda
Iniciar Sessão
bart
/
FPGC6
mirror de https://github.com/bartpleiter/FPGC6
1
0
Fork 0
Ficheiros Problemas 0 Wiki
Ramo: main
Ramos Etiquetas
FPGC6
/
Verilog
/
modules
/
GPU
/
NTSC
bart 1026f4776c Cleaned up some files há 2 anos atrás
..
NTSC.v 1026f4776c Cleaned up some files há 2 anos atrás
PhaseGen.v b74702c915 Created full FPGC6 verilog simulation, added Quartus code from FPGC5 with CPU from FPGC6. Works in hardware, but has combination loop somewhere at the arbiter and the registerbank and stack are not using block ram há 2 anos atrás
RGB332toNTSC.v b74702c915 Created full FPGC6 verilog simulation, added Quartus code from FPGC5 with CPU from FPGC6. Works in hardware, but has combination loop somewhere at the arbiter and the registerbank and stack are not using block ram há 2 anos atrás
RGBtoYPhaseAmpl.v b74702c915 Created full FPGC6 verilog simulation, added Quartus code from FPGC5 with CPU from FPGC6. Works in hardware, but has combination loop somewhere at the arbiter and the registerbank and stack are not using block ram há 2 anos atrás