TESTCH3.C 3.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175
  1. // Test CH376
  2. #define word char
  3. #include "LIB/MATH.C"
  4. #include "LIB/SYS.C"
  5. #include "LIB/STDLIB.C"
  6. #define FS_CMD_GET_IC_VER 0x01
  7. void BOTTOM_spiBeginTransfer()
  8. {
  9. asm(
  10. "; backup regs\n"
  11. "push r1\n"
  12. "push r2\n"
  13. "load32 0xC0272C r2 ; r2 = 0xC0272C\n"
  14. "load 0 r1 ; r1 = 0 (enable)\n"
  15. "write 0 r2 r1 ; write to SPI1_CS\n"
  16. "; restore regs\n"
  17. "pop r2\n"
  18. "pop r1\n"
  19. );
  20. }
  21. void BOTTOM_spiEndTransfer()
  22. {
  23. asm(
  24. "; backup regs\n"
  25. "push r1\n"
  26. "push r2\n"
  27. "load32 0xC0272C r2 ; r2 = 0xC0272C\n"
  28. "load 1 r1 ; r1 = 1 (disable)\n"
  29. "write 0 r2 r1 ; write to SPI1_CS\n"
  30. "; restore regs\n"
  31. "pop r2\n"
  32. "pop r1\n"
  33. );
  34. }
  35. word BOTTOM_spiTransfer(word dataByte)
  36. {
  37. word retval = 0;
  38. asm(
  39. "load32 0xC0272B r2 ; r2 = 0xC0272B\n"
  40. "write 0 r2 r4 ; write r4 over SPI1\n"
  41. "read 0 r2 r2 ; read return value\n"
  42. "write -4 r14 r2 ; write to stack to return\n"
  43. );
  44. return retval;
  45. }
  46. void TOP_spiBeginTransfer()
  47. {
  48. asm(
  49. "; backup regs\n"
  50. "push r1\n"
  51. "push r2\n"
  52. "load32 0xC0272F r2 ; r2 = 0xC0272F\n"
  53. "load 0 r1 ; r1 = 0 (enable)\n"
  54. "write 0 r2 r1 ; write to SPI2_CS\n"
  55. "; restore regs\n"
  56. "pop r2\n"
  57. "pop r1\n"
  58. );
  59. }
  60. void TOP_spiEndTransfer()
  61. {
  62. asm(
  63. "; backup regs\n"
  64. "push r1\n"
  65. "push r2\n"
  66. "load32 0xC0272F r2 ; r2 = 0xC0272F\n"
  67. "load 1 r1 ; r1 = 1 (disable)\n"
  68. "write 0 r2 r1 ; write to SPI2_CS\n"
  69. "; restore regs\n"
  70. "pop r2\n"
  71. "pop r1\n"
  72. );
  73. }
  74. word TOP_spiTransfer(word dataByte)
  75. {
  76. word retval = 0;
  77. asm(
  78. "load32 0xC0272E r2 ; r2 = 0xC0272E\n"
  79. "write 0 r2 r4 ; write r4 over SPI2\n"
  80. "read 0 r2 r2 ; read return value\n"
  81. "write -4 r14 r2 ; write to stack to return\n"
  82. );
  83. return retval;
  84. }
  85. word BOTTOM_getICver()
  86. {
  87. BOTTOM_spiBeginTransfer();
  88. BOTTOM_spiTransfer(FS_CMD_GET_IC_VER);
  89. word icVer = BOTTOM_spiTransfer(0x00);
  90. BOTTOM_spiEndTransfer();
  91. return icVer;
  92. }
  93. word TOP_getICver()
  94. {
  95. TOP_spiBeginTransfer();
  96. TOP_spiTransfer(FS_CMD_GET_IC_VER);
  97. word icVer = TOP_spiTransfer(0x00);
  98. TOP_spiEndTransfer();
  99. return icVer;
  100. }
  101. int main()
  102. {
  103. BDOS_PrintHexConsole(BOTTOM_getICver());
  104. BDOS_PrintcConsole('\n');
  105. BDOS_PrintHexConsole(TOP_getICver());
  106. BDOS_PrintcConsole('\n');
  107. return 'q';
  108. }
  109. void interrupt()
  110. {
  111. // handle all interrupts
  112. word i = getIntID();
  113. switch(i)
  114. {
  115. case INTID_TIMER1:
  116. timer1Value = 1; // notify ending of timer1
  117. break;
  118. case INTID_TIMER2:
  119. break;
  120. case INTID_UART0:
  121. break;
  122. case INTID_GPU:
  123. break;
  124. case INTID_TIMER3:
  125. break;
  126. case INTID_PS2:
  127. break;
  128. case INTID_UART1:
  129. break;
  130. case INTID_UART2:
  131. break;
  132. }
  133. }