FPGC6/Quartus/clkMux/clkMux.spd

<?xml version="1.0" encoding="UTF-8"?>
<simPackage>
 <file
   path="simulation/submodules/clkMux_altclkctrl_0.v"
   type="VERILOG"
   library="altclkctrl_0" />
 <file path="simulation/clkMux.v" type="VERILOG" />
 <topLevel name="clkMux" />
 <deviceFamily name="cycloneive" />
</simPackage>