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CPU
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9b3e3a5eb7
Initial progress with faster design.
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2 miesięcy temu |
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GPU
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0fd222280a
Added halfres rendering mode to gpu and mu. Added millis counter to mu. Raycaster now renders at half resolution and many improvements. Now at 40 to 70fps.
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1 rok temu |
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IO
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0fd222280a
Added halfres rendering mode to gpu and mu. Added millis counter to mu. Raycaster now renders at half resolution and many improvements. Now at 40 to 70fps.
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1 rok temu |
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Memory
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9b3e3a5eb7
Initial progress with faster design.
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2 miesięcy temu |
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DtrReset.v
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b74702c915
Created full FPGC6 verilog simulation, added Quartus code from FPGC5 with CPU from FPGC6. Works in hardware, but has combination loop somewhere at the arbiter and the registerbank and stack are not using block ram
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2 lat temu |
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FPGC6.v
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0fd222280a
Added halfres rendering mode to gpu and mu. Added millis counter to mu. Raycaster now renders at half resolution and many improvements. Now at 40 to 70fps.
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1 rok temu |
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FPGC6Simplified.v
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9b3e3a5eb7
Initial progress with faster design.
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2 miesięcy temu |
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MultiStabilizer.v
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b74702c915
Created full FPGC6 verilog simulation, added Quartus code from FPGC5 with CPU from FPGC6. Works in hardware, but has combination loop somewhere at the arbiter and the registerbank and stack are not using block ram
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2 lat temu |
bartpleiter
9b3e3a5eb7
Initial progress with faster design.