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bart 9a285550c0 Updated documentation a bit, added newlines to BENCH, removed wrong comments from L2cache.v		vor 1 Jahr
Assembler	7e81e7fa17 Added files missing from last commit (L1I cache).	vor 1 Jahr
BCC	9a285550c0 Updated documentation a bit, added newlines to BENCH, removed wrong comments from L2cache.v	vor 1 Jahr
Documentation	9a285550c0 Updated documentation a bit, added newlines to BENCH, removed wrong comments from L2cache.v	vor 1 Jahr
Graphics	c4599a63cc New documentation structure. Updated some documentation. Added relevant graphics scripts and files from FPGC5 repo.	vor 2 Jahren
Programmer	5af536210d Fixed instability by adding clear cache instruction during SPI transfer. No idea why this fixed the issue, as the I/O address range is above the limit for cache to work.	vor 1 Jahr
Quartus	9a285550c0 Updated documentation a bit, added newlines to BENCH, removed wrong comments from L2cache.v	vor 1 Jahr
SublimeText3	1026f4776c Cleaned up some files	vor 2 Jahren
Verilog	9a285550c0 Updated documentation a bit, added newlines to BENCH, removed wrong comments from L2cache.v	vor 1 Jahr
.gitattributes	b9bc26129d Added gitattributes to ignore the huge UARTbootloader.asm file. Deleted old quartus test project.	vor 2 Jahren
.gitignore	a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work.	vor 2 Jahren
LICENSE.txt	9ec3298860 Updated README and added licence so repo can go public now	vor 2 Jahren
README.md	3d9b4194f7 Added initial documentation	vor 2 Jahren

FPGC6