1
0

output_file.cof 1.0 KB

1234567891011121314151617181920212223242526272829303132
  1. <?xml version="1.0" encoding="US-ASCII" standalone="yes"?>
  2. <cof>
  3. <eprom_name>EPCQ128</eprom_name>
  4. <flash_loader_device>5CEFA5</flash_loader_device>
  5. <output_filename>output_files/output_file.jic</output_filename>
  6. <n_pages>1</n_pages>
  7. <width>1</width>
  8. <mode>7</mode>
  9. <sof_data>
  10. <user_name>Page_0</user_name>
  11. <page_flags>1</page_flags>
  12. <bit0>
  13. <sof_filename>/home/bart/Documents/FPGA/FPGC6/Quartus/output_files/FPGC.sof</sof_filename>
  14. </bit0>
  15. </sof_data>
  16. <version>10</version>
  17. <create_cvp_file>0</create_cvp_file>
  18. <create_hps_iocsr>0</create_hps_iocsr>
  19. <auto_create_rpd>0</auto_create_rpd>
  20. <rpd_little_endian>1</rpd_little_endian>
  21. <options>
  22. <map_file>1</map_file>
  23. </options>
  24. <advanced_options>
  25. <ignore_epcs_id_check>1</ignore_epcs_id_check>
  26. <ignore_condone_check>1</ignore_condone_check>
  27. <plc_adjustment>0</plc_adjustment>
  28. <post_chain_bitstream_pad_bytes>-1</post_chain_bitstream_pad_bytes>
  29. <post_device_bitstream_pad_bytes>-1</post_device_bitstream_pad_bytes>
  30. <bitslice_pre_padding>1</bitslice_pre_padding>
  31. </advanced_options>
  32. </cof>