This website works better with JavaScript
Эхлэл
Бүгдийг харах
Тусламж
Нэвтрэх
bart
/
FPGC6
-ын хуулбар
https://github.com/bartpleiter/FPGC6
Үзэх жагсаалтад нэмэх
1
Онцлох жагсаалтад нэмэх
0
Салаа
0
Файлууд
Асуудлууд
0
Мэдлэгийн сан
Мод:
904815e900
Салаанууд
Тагууд
EP4CE15
cpu100mhz
fast-cpu-pipeline
main
FPGC6
/
Quartus
/
modules
/
GPU
/
HDMI
bart
e1bb01a621
Cleaned and renamed Quartus project.
1 жил өмнө
..
RGB2HDMI.v
442d51ba85
Added images to documentation, HDMI is working without lvds, init of new sdram controller done.
2 жил өмнө
TMDSenc.v
b74702c915
Created full FPGC6 verilog simulation, added Quartus code from FPGC5 with CPU from FPGC6. Works in hardware, but has combination loop somewhere at the arbiter and the registerbank and stack are not using block ram
2 жил өмнө