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bart
/
FPGC6
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https://github.com/bartpleiter/FPGC6
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EP4CE15
cpu100mhz
fast-cpu-pipeline
main
FPGC6
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Verilog
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memory
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bin2txt.sh
bin2txt.sh
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hexdump -v -e '16/1 "%02x " "\n"' code.bin | tr '\n' ' ' > spi.txt