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HDMI
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e1bb01a621
Cleaned and renamed Quartus project.
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2 years ago |
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NTSC
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a76905443f
Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work.
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2 years ago |
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BGWrenderer.v
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b74702c915
Created full FPGC6 verilog simulation, added Quartus code from FPGC5 with CPU from FPGC6. Works in hardware, but has combination loop somewhere at the arbiter and the registerbank and stack are not using block ram
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2 years ago |
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FSX.v
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4e7cdb1216
Changed pixelplane to 24 bit colors. Updated texture generator and raycaster to 24 bit color.
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1 year ago |
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PixelEngine.v
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4e7cdb1216
Changed pixelplane to 24 bit colors. Updated texture generator and raycaster to 24 bit color.
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1 year ago |
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TimingGenerator.v
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b74702c915
Created full FPGC6 verilog simulation, added Quartus code from FPGC5 with CPU from FPGC6. Works in hardware, but has combination loop somewhere at the arbiter and the registerbank and stack are not using block ram
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2 years ago |
bart
4e7cdb1216
Changed pixelplane to 24 bit colors. Updated texture generator and raycaster to 24 bit color.