clkMux.qsys 2.7 KB

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  1. <?xml version="1.0" encoding="UTF-8"?>
  2. <system name="$${FILENAME}">
  3. <component
  4. name="$${FILENAME}"
  5. displayName="$${FILENAME}"
  6. version="1.0"
  7. description=""
  8. tags="INTERNAL_COMPONENT=true"
  9. categories="System" />
  10. <parameter name="bonusData"><![CDATA[bonusData
  11. {
  12. element altclkctrl_0
  13. {
  14. datum _sortIndex
  15. {
  16. value = "0";
  17. type = "int";
  18. }
  19. }
  20. }
  21. ]]></parameter>
  22. <parameter name="clockCrossingAdapter" value="HANDSHAKE" />
  23. <parameter name="device" value="5CEFA5F23I7" />
  24. <parameter name="deviceFamily" value="Cyclone V" />
  25. <parameter name="deviceSpeedGrade" value="7" />
  26. <parameter name="fabricMode" value="QSYS" />
  27. <parameter name="generateLegacySim" value="false" />
  28. <parameter name="generationId" value="0" />
  29. <parameter name="globalResetBus" value="false" />
  30. <parameter name="hdlLanguage" value="VERILOG" />
  31. <parameter name="hideFromIPCatalog" value="true" />
  32. <parameter name="lockedInterfaceDefinition" value="" />
  33. <parameter name="maxAdditionalLatency" value="1" />
  34. <parameter name="projectName">Test02_project_key.qpf</parameter>
  35. <parameter name="sopcBorderPoints" value="false" />
  36. <parameter name="systemHash" value="0" />
  37. <parameter name="testBenchDutName" value="" />
  38. <parameter name="timeStamp" value="0" />
  39. <parameter name="useTestBenchNamingPattern" value="false" />
  40. <instanceScript></instanceScript>
  41. <interface
  42. name="altclkctrl_input"
  43. internal="altclkctrl_0.altclkctrl_input"
  44. type="conduit"
  45. dir="end">
  46. <port name="inclk3x" internal="inclk3x" />
  47. <port name="inclk2x" internal="inclk2x" />
  48. <port name="inclk1x" internal="inclk1x" />
  49. <port name="inclk0x" internal="inclk0x" />
  50. <port name="clkselect" internal="clkselect" />
  51. </interface>
  52. <interface
  53. name="altclkctrl_output"
  54. internal="altclkctrl_0.altclkctrl_output"
  55. type="conduit"
  56. dir="end">
  57. <port name="outclk" internal="outclk" />
  58. </interface>
  59. <module
  60. name="altclkctrl_0"
  61. kind="altclkctrl"
  62. version="21.1"
  63. enabled="1"
  64. autoexport="1">
  65. <parameter name="CLOCK_TYPE" value="1" />
  66. <parameter name="DEVICE_FAMILY" value="Cyclone V" />
  67. <parameter name="ENA_REGISTER_MODE" value="1" />
  68. <parameter name="GUI_USE_ENA" value="false" />
  69. <parameter name="NUMBER_OF_CLOCKS" value="4" />
  70. <parameter name="USE_GLITCH_FREE_SWITCH_OVER_IMPLEMENTATION" value="false" />
  71. </module>
  72. <interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="HANDSHAKE" />
  73. <interconnectRequirement for="$system" name="qsys_mm.enableEccProtection" value="FALSE" />
  74. <interconnectRequirement for="$system" name="qsys_mm.insertDefaultSlave" value="FALSE" />
  75. <interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="1" />
  76. </system>