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FPGC6
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Albero (Tree):
24c2098f9e
Rami (Branch)
Tag
EP4CE15
cpu100mhz
fast-cpu-pipeline
main
FPGC6
/
Documentation
/
docs
/
Build-instructions
/
verilog.md
verilog.md
60 B
Cronologia
Originale
Verilog build/simulate instructions
TODO: write this page