bart/FPGC6

réplica de https://github.com/bartpleiter/FPGC6

Autor	SHA1 Mensaxe	Data
bart	28bcde6466 New SDRAM controller that uses both SDRAM chips. Now separate bus from MU for better performance, as controller runs at 100MHz. Also updated some debug code as debugging was needed. Tested working in hardware. 2x performance boost in some cases.	hai 1 ano
bart	1026f4776c Cleaned up some files	%!s(int64=2) %!d(string=hai) anos
bart	1cf78e1fab Added and updated the assembler (python version)	%!s(int64=2) %!d(string=hai) anos