Commit History

Author SHA1 Message Date
  bart da7bf6bf21 Added script for uploading text file. Updated syncCfiles script. 3 months ago
  bart 6b31f51206 Added file and dir creation to BRFS. 3 months ago
  bart a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work. 1 year ago
  bart 207413dd90 Assembler only needs Int: function, fixed position of program lenght. Ported ROM and UART bootloader over from FPGC5. Updated documentation on interrupts. Added resets. Fixed bug in MU. Increased stack size. Tested everything in hardware. Probably some other fixes and things I forgot. 2 years ago
  Bart 9da01544e7 Jump flush now seems to work. Made simple Quartus project to test in hardware and it seems to work fine there as well 2 years ago
  Bart 55f619efae Initial commit with some empty Verilog template code from FPGC5 2 years ago