SHA1 Permisiunea de a trimite mesaje. Dacă este dezactivată, utilizatorul nu va putea trimite nici un fel de mesaj
Data
bart
28bcde6466New SDRAM controller that uses both SDRAM chips. Now separate bus from MU for better performance, as controller runs at 100MHz. Also updated some debug code as debugging was needed. Tested working in hardware. 2x performance boost in some cases.
1 an în urmă
bart
308cc6a90dFixed SDRAM controller by setting phase shift to 180 degrees.
1 an în urmă
bart
b74702c915Created full FPGC6 verilog simulation, added Quartus code from FPGC5 with CPU from FPGC6. Works in hardware, but has combination loop somewhere at the arbiter and the registerbank and stack are not using block ram