52f2819774Removed leftover ccache instructions from debugging instability problems. Commented out required ccache instructions for when L1I cache returns in the future.
1 anno fa
bart
5af536210dFixed instability by adding clear cache instruction during SPI transfer. No idea why this fixed the issue, as the I/O address range is above the limit for cache to work.
1 anno fa
bart
7e81e7fa17Added files missing from last commit (L1I cache).
1 anno fa
b4rt-dev
8d56c91feaAdded fast (but inaccurate) and accurate (but slow) option for UART flasher.