História revízii

Autor SHA1 Správa Dátum
  bart 240770cb51 Progress on asm for bcc with new architecture. Started on SDRAM testbench for new controller. 1 rok pred
  bart 9f74a9565f Fixed more MU I/O bugs. Updated everything from BCC except the ASM to work on new CPU. Added back flasher programs. Fixed LOAD/HI bug by using unsigned const16 instead. Updated assembler including hotfix for FPGC jumping to addr3 after UART bootloader is done. FPGC6 now basically fully works again! 2 rokov pred
  bart 411c20ac98 Copied over BCC from FPGC5. No modifications yet. 2 rokov pred