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bart
/
FPGC6
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https://github.com/bartpleiter/FPGC6
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EP4CE15
cpu100mhz
fast-cpu-pipeline
main
Commit History
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bart
240770cb51
Progress on asm for bcc with new architecture. Started on SDRAM testbench for new controller.
1 år sedan
bart
01b9bb8f29
Added signed right shift operation to CPU, assembler, compiler, code and documentation.
2 år sedan
bart
411c20ac98
Copied over BCC from FPGC5. No modifications yet.
2 år sedan