 bart
|
8d9f556fd6
Basic operations of BRFS implemented and tested on small scale with examples.
|
8 kuukautta sitten |
|
bart
|
8b4880efa4
Progress on read function for BRFS.
|
8 kuukautta sitten |
|
bart
|
7fa4131bf9
Added open function to BRFS, new stdlib functions for basename dirname and strrchr
|
8 kuukautta sitten |
|
bart
|
3a5ff93ec6
BRFS now does not keep track of directory anymore. Added path traversal and more.
|
8 kuukautta sitten |
|
bart
|
693251f982
Added changedir and listdir functionality to BRFS.
|
8 kuukautta sitten |
|
bart
|
6b31f51206
Added file and dir creation to BRFS.
|
8 kuukautta sitten |
|
bart
|
01a00e1603
Update new repo link, add requirements.txt.
|
8 kuukautta sitten |
|
bart
|
d6f7dcb26d
Added initial code for BRFS (custom RAM filesystem).
|
8 kuukautta sitten |
|
bart
|
0fd222280a
Added halfres rendering mode to gpu and mu. Added millis counter to mu. Raycaster now renders at half resolution and many improvements. Now at 40 to 70fps.
|
1 vuosi sitten |
|
bart
|
7cfd77a292
Added fps counter to raycaster
|
1 vuosi sitten |
|
bart
|
33d828b6b9
All rendering of textured raycaster now done in assembly for significant speed improvement.
|
1 vuosi sitten |
|
bart
|
d2b53bb5e8
Added dark side of wall in raycaster. Moved data to data folder. Minor code improvements and prep for assembly screen render function.
|
1 vuosi sitten |
|
bart
|
4e7cdb1216
Changed pixelplane to 24 bit colors. Updated texture generator and raycaster to 24 bit color.
|
1 vuosi sitten |
|
bart
|
55b5818582
Textured raycaster is now fast enough for a demo.
|
1 vuosi sitten |
|
bart
|
9ac6dafd0f
POC texture rendering in raycaster. No code optimization yet so it is very slow.
|
1 vuosi sitten |
|
bart
|
f746bbd20d
Added movement to raycaster. Speed improvements to raycaster and script to precalculate direction and plane values for rotation, for each degree.
|
1 vuosi sitten |
|
bart
|
0eba720aeb
Initial working POC of a simple raycaster engine.
|
1 vuosi sitten |
|
bart
|
69d109e653
Added hardware signed and unsigned integer division and modulo. Created simple integer calculator to test. Updated several programs and BDOS to use new division hardware while keeping software calculation as legacy functions.
|
1 vuosi sitten |
|
bart
|
f3f3a43044
Added fixed-point signed divider to MU. Integrated into FPCALC.
|
1 vuosi sitten |
|
bart
|
ddd3d60235
Added Fixed-Point BCC library, including a FPCALC application to test it. MULTFP instruction is added to assembler, and some library functions were added during development.
|
1 vuosi sitten |
|
bart
|
3af9eecaa9
Added signed fixed point multiplication to ALU.
|
1 vuosi sitten |
|
bart
|
9294ee0605
Removed unused PLLs from quartus design. Replaced main PLL with Cyclone V PLL.
|
1 vuosi sitten |
|
bart
|
f78729ea77
Fixed L2 cache state machine issue which was only present in the previous commit.
|
1 vuosi sitten |
|
bart
|
82a433530c
Reverted L2 cache size to 1024 words for easier debugging.
|
1 vuosi sitten |
|
bart
|
da2bff2ea2
Removed/disabled NTSC from design, as the tiny HDMI monitor is practically always used. Also greatly increased L2 cache size, although no performance benefits for the relatively small programs I currently use for benchmarking.
|
1 vuosi sitten |
|
bart
|
2287e54c6b
Integrated valid bits into cache block ram. Reset now iteratively clears the entire cache. Allows for much lower FPGA usage and better timings. Should be able to greatly increase cache size as there is an abundance of BRAM.
|
1 vuosi sitten |
|
bart
|
2fe0518bb3
Improved interrupt timing/alignment, fixing bug where interrupts are not allowed during the UART bootloader.
|
1 vuosi sitten |
|
bart
|
52f2819774
Removed leftover ccache instructions from debugging instability problems. Commented out required ccache instructions for when L1I cache returns in the future.
|
1 vuosi sitten |
|
bart
|
9a285550c0
Updated documentation a bit, added newlines to BENCH, removed wrong comments from L2cache.v
|
1 vuosi sitten |
|
bart
|
88681ec5d0
New arbiter that further improves performance by removing latency for instruction memory access. Created instability again, which I found to be caused by bad interrupt timings. Fixed by changing the interruptValid wire to use branch_MEM for alignment. I do not know why this fixed all problems as it is very hard to simulate this issue. L1 cache should be possible again!
|
1 vuosi sitten |
