Commit History

Autor SHA1 Mensaxe Data
  bart 240770cb51 Progress on asm for bcc with new architecture. Started on SDRAM testbench for new controller. hai 1 ano
  bart 9f74a9565f Fixed more MU I/O bugs. Updated everything from BCC except the ASM to work on new CPU. Added back flasher programs. Fixed LOAD/HI bug by using unsigned const16 instead. Updated assembler including hotfix for FPGC jumping to addr3 after UART bootloader is done. FPGC6 now basically fully works again! %!s(int64=2) %!d(string=hai) anos
  bart 411c20ac98 Copied over BCC from FPGC5. No modifications yet. %!s(int64=2) %!d(string=hai) anos