bart/FPGC6

tükrözi: https://github.com/bartpleiter/FPGC6

Szerző	SHA1 Üzenet	Dátum
bart	308cc6a90d Fixed SDRAM controller by setting phase shift to 180 degrees.	2 éve
bart	a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work.	2 éve
bart	b74702c915 Created full FPGC6 verilog simulation, added Quartus code from FPGC5 with CPU from FPGC6. Works in hardware, but has combination loop somewhere at the arbiter and the registerbank and stack are not using block ram	2 éve