 bart
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01a00e1603
Update new repo link, add requirements.txt.
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il y a 8 mois |
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bart
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240770cb51
Progress on asm for bcc with new architecture. Started on SDRAM testbench for new controller.
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il y a 1 an |
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bart
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9f74a9565f
Fixed more MU I/O bugs. Updated everything from BCC except the ASM to work on new CPU. Added back flasher programs. Fixed LOAD/HI bug by using unsigned const16 instead. Updated assembler including hotfix for FPGC jumping to addr3 after UART bootloader is done. FPGC6 now basically fully works again!
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il y a 2 ans |
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bart
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411c20ac98
Copied over BCC from FPGC5. No modifications yet.
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il y a 2 ans |
