bart/FPGC6

Autore	SHA1 Messaggio	Data
bart	207413dd90 Assembler only needs Int: function, fixed position of program lenght. Ported ROM and UART bootloader over from FPGC5. Updated documentation on interrupts. Added resets. Fixed bug in MU. Increased stack size. Tested everything in hardware. Probably some other fixes and things I forgot.	2 anni fa
bart	69e83fb855 Fully implemented interrupts in verilog. Return address appears to work fine, but might need some further testing for different delays in the pipeline.	2 anni fa
bart	e493a27ab4 Started on interrupts. Triggering seems to work, reti still needs to be implemented	2 anni fa