Commit History

Author SHA1 Message Date
  bart 9cb7744c82 Create SPI flash library to interact with SPI flash, Added write updated sector functionality to BRFS, Some small fixes in other code. 5 months ago
  bart 52f2819774 Removed leftover ccache instructions from debugging instability problems. Commented out required ccache instructions for when L1I cache returns in the future. 1 year ago
  bart 5af536210d Fixed instability by adding clear cache instruction during SPI transfer. No idea why this fixed the issue, as the I/O address range is above the limit for cache to work. 1 year ago
  bart 3253b1bc2c Added L1I cache. Added clear cache instruction, which is now added in the UART bootloader and BDOS program loaders. Fixed too fast read part in SPI flasher. Snake userbdos program now sometimes crashes, which needs further investigation. 1 year ago
  bart 01b9bb8f29 Added signed right shift operation to CPU, assembler, compiler, code and documentation. 1 year ago
  b4rt-dev 8d56c91fea Added fast (but inaccurate) and accurate (but slow) option for UART flasher. 1 year ago
  bart 9f74a9565f Fixed more MU I/O bugs. Updated everything from BCC except the ASM to work on new CPU. Added back flasher programs. Fixed LOAD/HI bug by using unsigned const16 instead. Updated assembler including hotfix for FPGC jumping to addr3 after UART bootloader is done. FPGC6 now basically fully works again! 2 years ago