bart/FPGC6

Autore	SHA1 Messaggio	Data
bart	a76905443f Ported Quartus to 5CEA5 FPGA. SDRAM does not seem to work.	2 anni fa
bart	207413dd90 Assembler only needs Int: function, fixed position of program lenght. Ported ROM and UART bootloader over from FPGC5. Updated documentation on interrupts. Added resets. Fixed bug in MU. Increased stack size. Tested everything in hardware. Probably some other fixes and things I forgot.	2 anni fa
Bart	9da01544e7 Jump flush now seems to work. Made simple Quartus project to test in hardware and it seems to work fine there as well	2 anni fa
Bart	55f619efae Initial commit with some empty Verilog template code from FPGC5	2 anni fa