Removed leftover ccache instructions from debugging instability problems. Commented out required ccache instructions for when L1I cache returns in the future.

BCC/BDOS/lib/fs.c

@@ -142,7 +142,6 @@ word FS_spiTransfer(word dataByte)
 {
     word retval = 0;
     asm(
-        //"ccache\n"
         "load32 FS_SPI1_ADDR r2             ; r2 = FS_SPI1_ADDR\n"
         "write 0 r2 r4                      ; write r4 over SPI1\n"
         "read 0 r2 r2                       ; read return value\n"

BCC/BDOS/lib/netloader.c

@@ -139,14 +139,11 @@ void NETLOADER_runProgramFromMemory()
         "push r14\n"
         "push r15\n"
 
-        "ccache\n"
-        "ccache\n"
-        "ccache\n"
+        //"ccache\n"
         "savpc r1\n"
         "push r1\n"
         "jump 0x400000\n"
 
-        "ccache\n"
         "; restore registers\n"
         "pop r15\n"
         "pop r14\n"

BCC/BDOS/lib/shell.c

@@ -393,14 +393,11 @@ void SHELL_runFile(char* arg, word useBin)
                         "push r14\n"
                         "push r15\n"
 
-                        "ccache\n"
-                        "ccache\n"
-                        "ccache\n"
+                        //"ccache\n"
                         "savpc r1\n"
                         "push r1\n"
                         "jump 0x400000\n"
 
-                        "ccache\n"
                         "; restore registers\n"
                         "pop r15\n"
                         "pop r14\n"

BCC/BDOS/lib/wiz5500.c

@@ -167,7 +167,6 @@ word WizSpiTransfer(word dataByte)
 {
     word retval = 0;
     asm(
-        //"ccache\n"
         "load32 W5500_SPI3_ADDR r2          ; r2 = W5500_SPI3_ADDR\n"
         "write 0 r2 r4                      ; write r4 over SPI3\n"
         "read 0 r2 r2                       ; read return value\n"

BCC/BareMetal/flashProgrammer.c

@@ -110,7 +110,6 @@ word SpiTransfer(word dataByte)
 {
     word retval = 0;
     asm(
-        "ccache\n"
         "load32 W5500_SPI0_ADDR r2          ; r2 = W5500_SPI0_ADDR\n"
         "write 0 r2 r4                      ; write r4 over SPI0\n"
         "read 0 r2 r2                       ; read return value\n"

BCC/FPGCbuildTools/asm/lib/fs.c

@@ -128,7 +128,6 @@ word FS_spiTransfer(word dataByte)
 {
     word retval = 0;
     asm(
-        //"ccache\n"
         "load32 0xC0272B r2             ; r2 = 0xC0272B\n"
         "write 0 r2 r4                      ; write r4 over SPI1\n"
         "read 0 r2 r2                       ; read return value\n"

BCC/FPGCbuildTools/bcc/lib/fs.c

@@ -128,7 +128,6 @@ word FS_spiTransfer(word dataByte)
 {
     word retval = 0;
     asm(
-        //"ccache\n"
         "load32 0xC0272B r2             ; r2 = 0xC0272B\n"
         "write 0 r2 r4                      ; write r4 over SPI1\n"
         "read 0 r2 r2                       ; read return value\n"

BCC/userBDOS/LIB/FS.C

@@ -128,7 +128,6 @@ word FS_spiTransfer(word dataByte)
 {
   word retval = 0;
   asm(
-    //"ccache\n"
     "load32 0xC0272B r2       ; r2 = 0xC0272B\n"
     "write 0 r2 r4            ; write r4 over SPI1\n"
     "read 0 r2 r2             ; read return value\n"

BCC/userBDOS/LIB/SYS.C

@@ -39,11 +39,9 @@ word* syscall(word ID)
     "push r13\n"
     "push r14\n"
     "push r15\n"
-    //"ccache\n"
     "savpc r1\n"
     "push r1\n"
     "jump 4\n"
-    "ccache\n"
     "pop r15\n"
     "pop r14\n"
     "pop r13\n"

BCC/userBDOS/LIB/WIZ5500.C

@@ -158,7 +158,6 @@ word WizSpiTransfer(word dataByte)
 {
   word retval = 0;
   asm(
-      //"ccache\n"
       "load32 0xC02731 r2                 ; r2 = 0xC02731\n"
       "write 0 r2 r4                      ; write r4 over SPI3\n"
       "read 0 r2 r2                       ; read return value\n"