# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2015 Altera Corporation. All rights reserved.
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, the Altera Quartus Prime License Agreement,
# the Altera MegaCore Function License Agreement, or other
# applicable license agreement, including, without limitation,
# that your use is for the sole purpose of programming logic
# devices manufactured by Altera and sold by Altera or its
# authorized distributors.  Please refer to the applicable
# agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus Prime
# Version 15.1.0 Build 185 10/21/2015 SJ Standard Edition
# Date created = 20:47:05  November 27, 2017
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
#		FPGC_assignment_defaults.qdf
#    If this file doesn't exist, see file:
#		assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
#    file is updated automatically by the Quartus Prime software
#    and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #


set_global_assignment -name FAMILY "Cyclone V"
set_global_assignment -name DEVICE 5CEFA5F23I7
set_global_assignment -name TOP_LEVEL_ENTITY FPGC
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 21.1.1
set_global_assignment -name PROJECT_CREATION_TIME_DATE "16:46:59  DECEMBER 09, 2022"
set_global_assignment -name LAST_QUARTUS_VERSION "21.1.1 Lite Edition"
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name MIN_CORE_JUNCTION_TEMP "-40"
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 100
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 256
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"

set_location_assignment PIN_M9 -to clock
set_location_assignment PIN_V19 -to led
set_location_assignment PIN_AB18 -to nreset

set_location_assignment PIN_H20 -to SDRAM_A[12]
set_location_assignment PIN_H18 -to SDRAM_A[11]
set_location_assignment PIN_N19 -to SDRAM_A[10]
set_location_assignment PIN_J19 -to SDRAM_A[9]
set_location_assignment PIN_J18 -to SDRAM_A[8]
set_location_assignment PIN_K17 -to SDRAM_A[7]
set_location_assignment PIN_K16 -to SDRAM_A[6]
set_location_assignment PIN_L18 -to SDRAM_A[5]
set_location_assignment PIN_L19 -to SDRAM_A[4]
set_location_assignment PIN_L17 -to SDRAM_A[3]
set_location_assignment PIN_M16 -to SDRAM_A[2]
set_location_assignment PIN_M20 -to SDRAM_A[1]
set_location_assignment PIN_M18 -to SDRAM_A[0]
set_location_assignment PIN_P18 -to SDRAM_BA[1]
set_location_assignment PIN_P19 -to SDRAM_BA[0]
set_location_assignment PIN_T19 -to SDRAM_CASn
set_location_assignment PIN_G17 -to SDRAM_CKE
set_location_assignment PIN_G18 -to SDRAM_CLK
set_location_assignment PIN_P17 -to SDRAM_CSn
set_location_assignment PIN_U20 -to SDRAM_WEn
set_location_assignment PIN_P16 -to SDRAM_RASn
set_location_assignment PIN_AA22 -to SDRAM_DQ[0]
set_location_assignment PIN_AB22 -to SDRAM_DQ[1]
set_location_assignment PIN_Y22 -to SDRAM_DQ[2]
set_location_assignment PIN_Y21 -to SDRAM_DQ[3]
set_location_assignment PIN_W22 -to SDRAM_DQ[4]
set_location_assignment PIN_W21 -to SDRAM_DQ[5]
set_location_assignment PIN_V21 -to SDRAM_DQ[6]
set_location_assignment PIN_U22 -to SDRAM_DQ[7]
set_location_assignment PIN_M21 -to SDRAM_DQ[8]
set_location_assignment PIN_M22 -to SDRAM_DQ[9]
set_location_assignment PIN_T22 -to SDRAM_DQ[10]
set_location_assignment PIN_R21 -to SDRAM_DQ[11]
set_location_assignment PIN_R22 -to SDRAM_DQ[12]
set_location_assignment PIN_P22 -to SDRAM_DQ[13]
set_location_assignment PIN_N20 -to SDRAM_DQ[14]
set_location_assignment PIN_N21 -to SDRAM_DQ[15]
set_location_assignment PIN_K22 -to SDRAM_DQ[16]
set_location_assignment PIN_K21 -to SDRAM_DQ[17]
set_location_assignment PIN_J22 -to SDRAM_DQ[18]
set_location_assignment PIN_J21 -to SDRAM_DQ[19]
set_location_assignment PIN_H21 -to SDRAM_DQ[20]
set_location_assignment PIN_G22 -to SDRAM_DQ[21]
set_location_assignment PIN_G21 -to SDRAM_DQ[22]
set_location_assignment PIN_F22 -to SDRAM_DQ[23]
set_location_assignment PIN_E22 -to SDRAM_DQ[24]
set_location_assignment PIN_E20 -to SDRAM_DQ[25]
set_location_assignment PIN_D22 -to SDRAM_DQ[26]
set_location_assignment PIN_D21 -to SDRAM_DQ[27]
set_location_assignment PIN_C21 -to SDRAM_DQ[28]
set_location_assignment PIN_B22 -to SDRAM_DQ[29]
set_location_assignment PIN_A22 -to SDRAM_DQ[30]
set_location_assignment PIN_B21 -to SDRAM_DQ[31]
set_location_assignment PIN_U21 -to SDRAM_DQM[0]
set_location_assignment PIN_L22 -to SDRAM_DQM[1]
set_location_assignment PIN_K20 -to SDRAM_DQM[2]
set_location_assignment PIN_E21 -to SDRAM_DQM[3]

set_location_assignment PIN_R5 -to UART0_dtr
set_location_assignment PIN_M7 -to UART0_out
set_location_assignment PIN_N6 -to UART0_in

set_location_assignment PIN_AA14 -to UART2_out
set_location_assignment PIN_Y14 -to UART2_in

set_location_assignment PIN_R9 -to SPI0_clk
set_location_assignment PIN_M6 -to SPI0_cs
set_location_assignment PIN_U12 -to SPI0_data
set_location_assignment PIN_T8 -to SPI0_q
set_location_assignment PIN_N8 -to SPI0_wp
set_location_assignment PIN_V10 -to SPI0_hold

set_location_assignment PIN_AB20 -to SPI1_clk
set_location_assignment PIN_AB21 -to SPI1_cs
set_location_assignment PIN_AA20 -to SPI1_mosi
set_location_assignment PIN_AA19 -to SPI1_miso
set_location_assignment PIN_Y19 -to SPI1_rst
set_location_assignment PIN_Y20 -to SPI1_nint

set_location_assignment PIN_R15 -to SPI2_clk
set_location_assignment PIN_W19 -to SPI2_cs
set_location_assignment PIN_R17 -to SPI2_mosi
set_location_assignment PIN_T15 -to SPI2_miso
set_location_assignment PIN_U17 -to SPI2_rst
set_location_assignment PIN_R16 -to SPI2_nint

set_location_assignment PIN_T12 -to PS2_data
set_location_assignment PIN_AB15 -to PS2_clk

set_location_assignment PIN_AA7 -to SPI3_cs
set_location_assignment PIN_AB5 -to SPI3_clk
set_location_assignment PIN_AB6 -to SPI3_mosi
set_location_assignment PIN_AB8 -to SPI3_miso
set_location_assignment PIN_AA8 -to SPI3_nrst
set_location_assignment PIN_AB7 -to SPI3_int

set_location_assignment PIN_E19 -to SPI4_cs
set_location_assignment PIN_C20 -to SPI4_clk
set_location_assignment PIN_A20 -to SPI4_mosi
set_location_assignment PIN_C19 -to SPI4_miso
set_location_assignment PIN_F19 -to SPI4_gp

set_location_assignment PIN_B12 -to GPI[0]
set_location_assignment PIN_B13 -to GPI[1]
set_location_assignment PIN_A15 -to GPI[2]
set_location_assignment PIN_E15 -to GPI[3]
set_location_assignment PIN_C15 -to GPO[0]
set_location_assignment PIN_B16 -to GPO[1]
set_location_assignment PIN_B18 -to GPO[2]
set_location_assignment PIN_A18 -to GPO[3]

set_location_assignment PIN_P14 -to DIPS[0]
set_location_assignment PIN_U16 -to DIPS[1]
set_location_assignment PIN_AB17 -to DIPS[2]
set_location_assignment PIN_V20 -to DIPS[3]

set_location_assignment PIN_B6 -to TMDS_p[3]
set_location_assignment PIN_B7 -to TMDS_n[3]
set_location_assignment PIN_L7 -to TMDS_p[2]
set_location_assignment PIN_K7 -to TMDS_n[2]
set_location_assignment PIN_J7 -to TMDS_p[1]
set_location_assignment PIN_J8 -to TMDS_n[1]
set_location_assignment PIN_A8 -to TMDS_p[0]
set_location_assignment PIN_A7 -to TMDS_n[0]

set_location_assignment PIN_R14 -to led_Booted
set_location_assignment PIN_C18 -to led_Eth
set_location_assignment PIN_B17 -to led_Flash
set_location_assignment PIN_AA15 -to led_USB0
set_location_assignment PIN_C16 -to led_USB1
set_location_assignment PIN_F18 -to led_PS2
set_location_assignment PIN_A19 -to led_HDMI
set_location_assignment PIN_A17 -to led_QSPI
set_location_assignment PIN_B20 -to led_GPU
set_location_assignment PIN_D19 -to led_I2S

set_location_assignment PIN_AB12 -to I2S_SDIN
set_location_assignment PIN_Y15 -to I2S_SCLK
set_location_assignment PIN_AA13 -to I2S_LRCLK
set_location_assignment PIN_R11 -to I2S_MCLK

set_location_assignment PIN_B15 -to composite[0]
set_location_assignment PIN_F15 -to composite[1]
set_location_assignment PIN_A14 -to composite[2]
set_location_assignment PIN_A13 -to composite[3]
set_location_assignment PIN_A12 -to composite[4]
set_location_assignment PIN_F14 -to composite[5]
set_location_assignment PIN_G13 -to composite[6]
set_location_assignment PIN_E12 -to composite[7]

# set_global_assignment -name IOBANK_VCCIO 2.5V -section_id 8A


set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
#set_instance_assignment -name IO_STANDARD LVDS -to TMDS_p[3]
#set_instance_assignment -name IO_STANDARD LVDS -to TMDS_n[3]
#set_instance_assignment -name IO_STANDARD LVDS -to TMDS_p[2]
#set_instance_assignment -name IO_STANDARD LVDS -to TMDS_n[2]
#set_instance_assignment -name IO_STANDARD LVDS -to TMDS_p[1]
#set_instance_assignment -name IO_STANDARD LVDS -to TMDS_n[1]
#set_instance_assignment -name IO_STANDARD LVDS -to TMDS_p[0]
#set_instance_assignment -name IO_STANDARD LVDS -to TMDS_n[0]
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to GPI[0]
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to GPI[1]
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to GPI[2]
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to GPI[3]
set_global_assignment -name OPTIMIZATION_MODE "HIGH PERFORMANCE EFFORT"
set_global_assignment -name SDC_FILE FPGC.sdc
set_global_assignment -name VERILOG_FILE modules/FPGC.v
set_global_assignment -name VERILOG_FILE modules/Memory/L1Icache.v
set_global_assignment -name VERILOG_FILE modules/Memory/L1Dcache.v
set_global_assignment -name VERILOG_FILE modules/Memory/L2cache.v
set_global_assignment -name VERILOG_FILE modules/GPU/NTSC/RGBtoYPhaseAmpl.v
set_global_assignment -name VERILOG_FILE modules/GPU/NTSC/RGB332toNTSC.v
set_global_assignment -name VERILOG_FILE modules/GPU/NTSC/PhaseGen.v
set_global_assignment -name VERILOG_FILE modules/GPU/NTSC/NTSC.v
set_global_assignment -name VERILOG_FILE modules/GPU/PixelEngine.v
set_global_assignment -name VERILOG_FILE modules/GPU/FSX.v
set_global_assignment -name VERILOG_FILE modules/GPU/HDMI/TMDSenc.v
set_global_assignment -name VERILOG_FILE modules/GPU/HDMI/RGB2HDMI.v
set_global_assignment -name VERILOG_FILE modules/GPU/TimingGenerator.v
set_global_assignment -name VERILOG_FILE modules/GPU/BGWrenderer.v
set_global_assignment -name VERILOG_FILE modules/IO/LEDvisualizer.v
set_global_assignment -name VERILOG_FILE modules/IO/SimpleSPI.v
set_global_assignment -name VERILOG_FILE modules/IO/UARTrx.v
set_global_assignment -name VERILOG_FILE modules/IO/UARTtx.v
set_global_assignment -name VERILOG_FILE modules/IO/OStimer.v
set_global_assignment -name VERILOG_FILE modules/IO/NESpadReader.v
set_global_assignment -name VERILOG_FILE modules/IO/Keyboard.v
set_global_assignment -name VERILOG_FILE modules/CPU/ALU.v
set_global_assignment -name VERILOG_FILE modules/CPU/Arbiter.v
set_global_assignment -name VERILOG_FILE modules/CPU/ControlUnit.v
set_global_assignment -name VERILOG_FILE modules/CPU/CPU.v
set_global_assignment -name VERILOG_FILE modules/CPU/DataMem.v
set_global_assignment -name VERILOG_FILE modules/CPU/InstrMem.v
set_global_assignment -name VERILOG_FILE modules/CPU/InstructionDecoder.v
set_global_assignment -name VERILOG_FILE modules/CPU/Regbank.v
set_global_assignment -name VERILOG_FILE modules/CPU/Regr.v
set_global_assignment -name VERILOG_FILE modules/CPU/Stack.v
set_global_assignment -name VERILOG_FILE modules/CPU/IntController.v
set_global_assignment -name VERILOG_FILE modules/Memory/VRAM.v
set_global_assignment -name VERILOG_FILE modules/Memory/SPIreader.v
set_global_assignment -name VERILOG_FILE modules/Memory/SDRAMcontroller.v
set_global_assignment -name VERILOG_FILE modules/Memory/ROM.v
set_global_assignment -name VERILOG_FILE modules/Memory/MemoryUnit.v
set_global_assignment -name VERILOG_FILE modules/MultiStabilizer.v
set_global_assignment -name VERILOG_FILE modules/DtrReset.v
set_global_assignment -name QIP_FILE ddr.qip
set_global_assignment -name QIP_FILE mainpll.qip
set_global_assignment -name SIP_FILE mainpll.sip
set_global_assignment -name TIMING_ANALYZER_MULTICORNER_ANALYSIS ON
set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
set_global_assignment -name ALM_REGISTER_PACKING_EFFORT LOW
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top